A Novel Pair of Replacement Algorithms on L 1 and L 2 Cache for FFT

_ Processors speed is much faster than memory; to bridge this gap cache memory is used. This paper proposes a preeminent pair of replacement algorithms for Level 1 cache (L1) and Level 2 cache (L2) respectively for the Fast Fourier Transform (FFT). The access patterns of L1 and L2 are different, when CPU does not get the desired data in L1 then it refers to L2. Thus the replacement algorithm which works efficiently for L1 may not be efficient for L2. With the memory access pattern of FFT, the paper has simulated and analyzed the behavior of various existing replacement algorithms on L1 and L2 respectively. The replacement algorithms which are taken into consideration are: Least Recently Used (LRU), Least Frequently Used (LFU) and First In First Out (FIFO). This paper has also proposed new replacement algorithms for L1 (FFTNEW1) and for L2 (FFTNEW2) respectively for the same application. Simulation results shows that by applying the proposed pair of replacement algorithms miss rates are considerably reduced.